With the growing need and the development of power systems, the investigation of high-performance and high-efficiency power devices is required more than ever before. Silicon has served as the major material due to its high volume in nature and mature industrial technology. With the zero-emissions goal set by more and more countries and nations, wide bandgap semiconductors have become a popular choice for power conversion systems. Among them, silicon carbide (SiC) is one of the most successful candidates due to its similarity to silicon (Si), high critical electric field and high thermal conduction capability. In this thesis, the focus lies on the exploration of the design and simulation of high-performance SiC-based devices.

Power semiconductor devices are the building elements which support high voltage in power conversion systems. The technology is based on P-N junction and MOS capacitor structures. Therefore, research and production always start with diodes, followed by more complicated gate-controlled devices including Metal-Semiconductor-Oxide Field Effect Transistors (MOSFETs) and Insulated Gate Bipolar Transistors (IGBTs). SiC MOSFETs are the most successful devices for their relatively simplified process flow and low switching losses.

Traditional MOSFETs conduct current with either planar or vertical channels. Planar devices, with careful designs, can withstand high electric fields at the junction corners and gate oxide. While the naturally formed JFET region can never be eliminated, and the trade-offs must be optimised between long-term oxide reliability and on-resistance. Trench MOSFETs, serve as a substitute for planar devices. One of trench MOSFETs’ crucial issues is the electric field crowding. The solution to this could be a heavily doped p-shield region beneath the trench oxide bottom. One commercial solution is to fully shield one side of the channels and leave another channel as the high-conduction path. In this thesis, a SiC hybrid-channel trench MOSFET (HCT-MOSFET) is proposed and investigated to enable high conduction during the devices’ on-state and maintain the blocking voltage. The thesis investigates several SiC basic MOSFETs and hybrid-channel MOSFETs layouts. Based upon this, several comparative studies are conducted through extensive simulations to evaluate the effects of the SiC architecture of the HCT-MOSFET designs.

Another concept proposed in this thesis is referred to as the alternating P-Rings MOSFET (APR-MOSFET); this is based on 3D device design and modelling. The design employs a small opening at the bottom of trench oxide and extends in the third dimension, allowing more current to flow through the device and thus enhancing the current density.

The design and optimisation of SiC IGBTs are the last focus of the thesis. Both the physical properties and the devices’ architecture greatly influence the devices’ performance. Variants of these devices are investigated, to understand the impact on on-state performance and short-circuit robustness. For the planar devices, simulations show that increasing the carrier lifetime from 1 to 10 μs has not only a profound effect on reducing on-state losses but also increases short circuit withstand time (SCWT) by 39%.